Impacts of parallel programming on limited-resource hardware - Hoffmann Filho, Renato Barreto (2023)
Limited resource hardware devices are more affordable and energy efficient than high-end hardware. Despite their reduced size, these devices are increasingly complex, with many now featuring multiple processing cores, GPGPU accelerators, and larger RAM capacity. To fully utilize their computational capacity, software developers must exploit parallelism, but this adds an extra layer of complexity because they must balance computational constraints and performance demands. Therefore, choosing the appropriate parallelism strategy and parallel programming interface is crucial to achieving the best hardware performance. To tackle this problem, we defined research objectives to guide our work in finding the most appropriate parallelism strategies and programming interfaces for limited-resource hardware regarding performance and energy consumption. We experimented with 12 applications using three devices and seven parallel programming interfaces. This thesis introduces new metrics, additional applications, various parallelism interfaces, and extra hardware devices. We developed a structured set of research objectives to evaluate parallelism, providing a methodology to organize many parallelism considerations. In summary, this study concludes that parallel computing is beneficial in limited-resource hardware, and higher-level of abstraction parallel programming interfaces are viable options. Our results on target architecture and specific parallelism models indicate that parallelism benefits limited-resource hardware, reducing total energy consumption by up to 63.53% and increasing throughput by up to 112.54%. Additionally, power peak differences are up to 24.98% between programming techniques. Another indication is that there are estimated software complexity differences between programming interfaces of up to 858.33%. Overall, this thesis contributes to understanding the impacts of parallel programming on limited-resource hardware and provides insights into optimizing parallel programs for such hardware. Our findings can be helpful for researchers, developers, and engineers working on parallel programming for limited-resource hardware.