Robust OBC: um sistema de computação de bordo tolerante a falhas

Detalhes bibliográficos
Ano de defesa: 2022
Autor(a) principal: Mota, David Freitas Moura
Orientador(a): Mota, João César Moura
Banca de defesa: Não Informado pela instituição
Tipo de documento: Tese
Tipo de acesso: Acesso aberto
Idioma: por
Instituição de defesa: Não Informado pela instituição
Programa de Pós-Graduação: Não Informado pela instituição
Departamento: Não Informado pela instituição
País: Não Informado pela instituição
Palavras-chave em Português:
Link de acesso: http://www.repositorio.ufc.br/handle/riufc/64557
Resumo: The use of nanosatellites that utilize the CubeSat standard is currently growing due to their low manufacturing and launch costs compared to traditional satellites. In addition, these types of nanosatellites have a wide variety of applications, ranging from simple to critical applications. For critical applications, it can be necessary that the nanosatellite subsystems have some protection against radiation and its effects (Rad-Hard) because severe failures can make its mission almost impossible to accomplish. Especially the onboard computer (OBC), which is considered the brain of the nanosatellite and needs special attention regarding fault tolerance techniques. RadHard components are the most reliable solution to propose in designing an OBC for critical applications. However, the high cost and limited access to these components make it almost impossible for universities and small companies to research and develop OBCs that use this type of component. With this in mind, this thesis proposes an architecture for a fault-tolerant OBC that uses only COTS components, where the use of the proposed fault tolerance techniques results in an increase in reliability, so as to increase the degree of fault tolerance of an OBC, similar to what occurs when using Rad-Hard components. For this purpose, fault tolerance techniques that could bring reliability to the onboard computer were researched and implemented, such as a processor redundancy switching system, a fault manager that could verify if the faults are permanent or transient, as well as other systems such as SRAM memory protection system and a system that manages the redundancy switching of OBCs. The experimental tests performed on the proposed OBC fault tolerance systems obtained results that addressed the requirements described in this thesis, which were based on three main fundamentals: low electrical power consumption, high computational performance, and high reliability. Additionally, its reliability is compatible with existing OBCs from academic and industrial communities. In this sense, this thesis describes an architecture of a high-reliability OBC, which has differential fault tolerance techniques capable of providing continuity of operation of the onboard computing subsystem even in the presence of failures. In the face of the results, it can be concluded that the objectives of this thesis were achieved because not only a fault-tolerant OBC based on COTS was proposed, but also secondary objectives such as low power consumption, high performance, and reconfigurability of the system were achieved.
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spelling Mota, David Freitas MouraVargas, Fabian LuisMota, João César Moura2022-03-23T10:41:00Z2022-03-23T10:41:00Z2022MOTA, David Freitas Moura. Robust OBC: um sistema de computação de bordo tolerante a falhas. 2022. 143 f. Tese (Doutorado em Engenharia de Teleinformática) – Universidade Federal do Ceará, Centro de Tecnologia, Programa de Pós-graduação em Engenharia de Teleinformática, Fortaleza, 2022.http://www.repositorio.ufc.br/handle/riufc/64557The use of nanosatellites that utilize the CubeSat standard is currently growing due to their low manufacturing and launch costs compared to traditional satellites. In addition, these types of nanosatellites have a wide variety of applications, ranging from simple to critical applications. For critical applications, it can be necessary that the nanosatellite subsystems have some protection against radiation and its effects (Rad-Hard) because severe failures can make its mission almost impossible to accomplish. Especially the onboard computer (OBC), which is considered the brain of the nanosatellite and needs special attention regarding fault tolerance techniques. RadHard components are the most reliable solution to propose in designing an OBC for critical applications. However, the high cost and limited access to these components make it almost impossible for universities and small companies to research and develop OBCs that use this type of component. With this in mind, this thesis proposes an architecture for a fault-tolerant OBC that uses only COTS components, where the use of the proposed fault tolerance techniques results in an increase in reliability, so as to increase the degree of fault tolerance of an OBC, similar to what occurs when using Rad-Hard components. For this purpose, fault tolerance techniques that could bring reliability to the onboard computer were researched and implemented, such as a processor redundancy switching system, a fault manager that could verify if the faults are permanent or transient, as well as other systems such as SRAM memory protection system and a system that manages the redundancy switching of OBCs. The experimental tests performed on the proposed OBC fault tolerance systems obtained results that addressed the requirements described in this thesis, which were based on three main fundamentals: low electrical power consumption, high computational performance, and high reliability. Additionally, its reliability is compatible with existing OBCs from academic and industrial communities. In this sense, this thesis describes an architecture of a high-reliability OBC, which has differential fault tolerance techniques capable of providing continuity of operation of the onboard computing subsystem even in the presence of failures. In the face of the results, it can be concluded that the objectives of this thesis were achieved because not only a fault-tolerant OBC based on COTS was proposed, but also secondary objectives such as low power consumption, high performance, and reconfigurability of the system were achieved.O uso de nano satélites que utilizam o padrão CubeSat vem crescendo atualmente devido ao seu baixo custo de fabricação e lançamento em relação aos satélites tradicionais. Além disso, este tipo de nano satélites possui uma grande variedade de aplicações, que vão desde aplicações simples até críticas. Para aplicações críticas, é necessário que os subsistemas do nano satélite tenham algum tipo de proteção contra a radiação e seus efeitos (Rad-Hard), pois falhas severas podem inviabilizar a missão do mesmo. Principalmente o computador de bordo (OBC), o qual é considerado o cérebro do nano satélite e necessita de uma atenção especial no que diz respeito a técnicas de tolerância a falhas. O uso de componentes Rad-Hard é a solução de maior confiabilidade para se propor em projetos de um OBC para aplicações críticas, porém o alto custo de aquisição e o difícil acesso a esses componentes impossibilitam, por parte das universidades e pequenas empresas, a pesquisa e desenvolvimento de OBCs que utilizam este tipo de componente. Com isso, essa tese propõe uma arquitetura de um OBC tolerante a falhas que faz uso de somente componentes COTS, no qual o uso de técnicas de tolerância a falhas propostas resultam em um incremento na confiabilidade, de forma a, a exemplo de componentes Rad-Hard, proporcionar a OBCs um alto grau de tolerância a falhas. Para isso, foram pesquisadas e implementadas técnicas de tolerância a falhas que possam trazer confiabilidade ao OBC como, por exemplo, um sistema de chaveamento de processadores, um gerenciador de falhas que pudesse verificar se as falhas são permanentes ou transitórias e, assim, realizar uma tomada de decisão, assim como outros sistemas como sistema de proteção de memória SRAM e sistema que gerencia o chaveamento de redundância de OBCs. Os testes experimentais realizados nos sistemas de tolerância a falhas do OBC proposto obtiveram resultados que atenderam aos requisitos descritos nesta tese, que se baseiam em três fundamentos principais: baixo consumo de potância elétrica, alto desempenho computacional e alta confiabilidade. Adicionalmente, sua confiabilidade mostrou-se compatível com os OBCs existentes tanto da comunidade acadêmica como do meio industrial. Neste sentido, essa tese descreve uma arquitetura de um OBC de alta confiabilidade, que possui como diferencial técnicas de tolerância a falhas capaz de prover continuidade de funcionamento do subsistema de computação de bordo mesmo na presença de falhas. Em vistas dos resultados pode-se concluir que os objetivos foram alcançados pois, além de proposto um OBC tolerante a falhas baseado em COTS, ainda foram atingidos objetivos secundários como baixo consumo de energia, alto desempenho e reconfigurabilidade do sistema.CubeSatComputador de bordoRad-HardCOTSRobust OBC: um sistema de computação de bordo tolerante a falhasinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/doctoralThesisporreponame:Repositório Institucional da Universidade Federal do Ceará (UFC)instname:Universidade Federal do Ceará (UFC)instacron:UFCinfo:eu-repo/semantics/openAccessORIGINAL2022_tese_dfmmota.pdf2022_tese_dfmmota.pdfapplication/pdf11710418http://repositorio.ufc.br/bitstream/riufc/64557/1/2022_tese_dfmmota.pdff1a6f68447843a400ef06271b1577e0dMD51LICENSElicense.txtlicense.txttext/plain; charset=utf-82158http://repositorio.ufc.br/bitstream/riufc/64557/2/license.txte63c6ed4faa81e8b90d2fac75971a7d6MD52riufc/645572022-04-28 09:24:03.721oai:repositorio.ufc.br:riufc/64557TElDRU7Dh0EgREUgQVJNQVpFTkFNRU5UTyBFIERJU1RSSUJVScOHw4NPIE7Dg08tRVhDTFVTSVZBIA0KDQpBbyBjb25jb3JkYXIgY29tIGVzdGEgbGljZW7Dp2EsIHZvY8OqKHMpIGF1dG9yKGVzKSBvdSB0aXR1bGFyKGVzKSBkb3MgZGlyZWl0b3MgYXV0b3JhaXMgZGEgb2JyYSBhcXVpIGRlc2NyaXRhIGNvbmNlZGUobSkgw6AgVW5pdmVyc2lkYWRlIEZlZGVyYWwgZG8gQ2VhcsOhLCBnZXN0b3JhIGRvIFJlcG9zaXTDs3JpbyBJbnN0aXR1Y2lvbmFsIGRhIFVGQyAtIFJJL1VGQywgbyBkaXJlaXRvIG7Do28tZXhjbHVzaXZvIGRlIHJlcHJvZHV6aXIsIGNvbnZlcnRlciAoY29tbyBkZWZpbmlkbyBhYmFpeG8pIGUvb3UgZGlzdHJpYnVpciBvIGRvY3VtZW50byBkZXBvc2l0YWRvIGVtIGZvcm1hdG8gaW1wcmVzc28sIGVsZXRyw7RuaWNvIG91IGVtIHF1YWxxdWVyIG91dHJvIG1laW8uIFZvY8OqIGNvbmNvcmRhKG0pIHF1ZSBhIFVuaXZlcnNpZGFkZSBGZWRlcmFsIGRvIENlYXLDoSwgZ2VzdG9yYSBkbyBSZXBvc2l0w7NyaW8gSW5zdGl0dWNpb25hbCBkYSBVRkMgLSBSSS9VRkMsIHBvZGUsIHNlbSBhbHRlcmFyIG8gY29udGXDumRvLCBjb252ZXJ0ZXIgbyBhcnF1aXZvIGRlcG9zaXRhZG8gYSBxdWFscXVlciBtZWlvIG91IGZvcm1hdG8gY29tIGZpbnMgZGUgcHJlc2VydmHDp8Ojby4gVm9jw6oocykgdGFtYsOpbSBjb25jb3JkYShtKSBxdWUgYSBVbml2ZXJzaWRhZGUgRmVkZXJhbCBkbyBDZWFyw6EsIGdlc3RvcmEgZG8gUmVwb3NpdMOzcmlvIEluc3RpdHVjaW9uYWwgZGEgVUZDIC0gUkkvVUZDLCBwb2RlIG1hbnRlciBtYWlzIGRlIHVtYSBjw7NwaWEgZGVzdGUgZGVww7NzaXRvIHBhcmEgZmlucyBkZSBzZWd1cmFuw6dhLCBiYWNrLXVwIGUvb3UgcHJlc2VydmHDp8Ojby4gVm9jw6ogZGVjbGFyYSBxdWUgYSBhcHJlc2VudGHDp8OjbyBkbyBzZXUgdHJhYmFsaG8gw6kgb3JpZ2luYWwgZSBxdWUgdm9jw6oocykgcG9kZShtKSBjb25jZWRlciBvcyBkaXJlaXRvcyBjb250aWRvcyBuZXN0YSBsaWNlbsOnYS4gVm9jw6ogdGFtYsOpbSBkZWNsYXJhKG0pIHF1ZSBvIGVudmlvIMOpIGRlIHNldSBjb25oZWNpbWVudG8gZSBuw6NvIGluZnJpbmdlIG9zIGRpcmVpdG9zIGF1dG9yYWlzIGRlIG91dHJhIHBlc3NvYSBvdSBpbnN0aXR1acOnw6NvLiBDYXNvIG8gZG9jdW1lbnRvIGEgc2VyIGRlcG9zaXRhZG8gY29udGVuaGEgbWF0ZXJpYWwgcGFyYSBvIHF1YWwgdm9jw6oocykgbsOjbyBkZXTDqW0gYSB0aXR1bGFyaWRhZGUgZG9zIGRpcmVpdG9zIGRlIGF1dG9yYWlzLCB2b2PDqihzKSBkZWNsYXJhKG0pIHF1ZSBvYnRldmUgYSBwZXJtaXNzw6NvIGlycmVzdHJpdGEgZG8gdGl0dWxhciBkb3MgZGlyZWl0b3MgYXV0b3JhaXMgZGUgY29uY2VkZXIgw6AgVW5pdmVyc2lkYWRlIEZlZGVyYWwgZG8gQ2VhcsOhLCBnZXN0b3JhIGRvIFJlcG9zaXTDs3JpbyBJbnN0aXR1Y2lvbmFsIGRhIFVGQyAtIFJJL1VGQywgb3MgZGlyZWl0b3MgcmVxdWVyaWRvcyBwb3IgZXN0YSBsaWNlbsOnYSBlIHF1ZSBvcyBtYXRlcmlhaXMgZGUgcHJvcHJpZWRhZGUgZGUgdGVyY2Vpcm9zLCBlc3TDo28gZGV2aWRhbWVudGUgaWRlbnRpZmljYWRvcyBlIHJlY29uaGVjaWRvcyBubyB0ZXh0byBvdSBjb250ZcO6ZG8gZGEgYXByZXNlbnRhw6fDo28uDQogQ0FTTyBPIFRSQUJBTEhPIERFUE9TSVRBRE8gVEVOSEEgU0lETyBGSU5BTkNJQURPIE9VIEFQT0lBRE8gUE9SIFVNIMOTUkfDg08sIFFVRSBOw4NPIEEgSU5TVElUVUnDh8ODTyBERVNURSBSRVBPU0lUw5NSSU86IFZPQ8OKIERFQ0xBUkEgVEVSIENVTVBSSURPIFRPRE9TIE9TIERJUkVJVE9TIERFIFJFVklTw4NPIEUgUVVBSVNRVUVSIE9VVFJBUyBPQlJJR0HDh8OVRVMgUkVRVUVSSURBUyBQRUxPIENPTlRSQVRPIE9VIEFDT1JETy4gDQpPIHJlcG9zaXTDs3JpbyBpZGVudGlmaWNhcsOhIGNsYXJhbWVudGUgbyBzZXUocykgbm9tZShzKSBjb21vIGF1dG9yKGVzKSBvdSB0aXR1bGFyKGVzKSBkbyBkaXJlaXRvIGRlIGF1dG9yKGVzKSBkbyBkb2N1bWVudG8gc3VibWV0aWRvIGUgZGVjbGFyYSBxdWUgbsOjbyBmYXLDoSBxdWFscXVlciBhbHRlcmHDp8OjbyBhbMOpbSBkYXMgcGVybWl0aWRhcyBwb3IgZXN0YSBsaWNlbsOnYS4NClJlcG9zaXTDs3JpbyBJbnN0aXR1Y2lvbmFsIGRhIFVGQy4NCg==Repositório InstitucionalPUBhttp://www.repositorio.ufc.br/ri-oai/requestbu@ufc.br || repositorio@ufc.bropendoar:2022-04-28T12:24:03Repositório Institucional da Universidade Federal do Ceará (UFC) - Universidade Federal do Ceará (UFC)false
dc.title.pt_BR.fl_str_mv Robust OBC: um sistema de computação de bordo tolerante a falhas
title Robust OBC: um sistema de computação de bordo tolerante a falhas
spellingShingle Robust OBC: um sistema de computação de bordo tolerante a falhas
Mota, David Freitas Moura
CubeSat
Computador de bordo
Rad-Hard
COTS
title_short Robust OBC: um sistema de computação de bordo tolerante a falhas
title_full Robust OBC: um sistema de computação de bordo tolerante a falhas
title_fullStr Robust OBC: um sistema de computação de bordo tolerante a falhas
title_full_unstemmed Robust OBC: um sistema de computação de bordo tolerante a falhas
title_sort Robust OBC: um sistema de computação de bordo tolerante a falhas
author Mota, David Freitas Moura
author_facet Mota, David Freitas Moura
author_role author
dc.contributor.co-advisor.none.fl_str_mv Vargas, Fabian Luis
dc.contributor.author.fl_str_mv Mota, David Freitas Moura
dc.contributor.advisor1.fl_str_mv Mota, João César Moura
contributor_str_mv Mota, João César Moura
dc.subject.por.fl_str_mv CubeSat
Computador de bordo
Rad-Hard
COTS
topic CubeSat
Computador de bordo
Rad-Hard
COTS
description The use of nanosatellites that utilize the CubeSat standard is currently growing due to their low manufacturing and launch costs compared to traditional satellites. In addition, these types of nanosatellites have a wide variety of applications, ranging from simple to critical applications. For critical applications, it can be necessary that the nanosatellite subsystems have some protection against radiation and its effects (Rad-Hard) because severe failures can make its mission almost impossible to accomplish. Especially the onboard computer (OBC), which is considered the brain of the nanosatellite and needs special attention regarding fault tolerance techniques. RadHard components are the most reliable solution to propose in designing an OBC for critical applications. However, the high cost and limited access to these components make it almost impossible for universities and small companies to research and develop OBCs that use this type of component. With this in mind, this thesis proposes an architecture for a fault-tolerant OBC that uses only COTS components, where the use of the proposed fault tolerance techniques results in an increase in reliability, so as to increase the degree of fault tolerance of an OBC, similar to what occurs when using Rad-Hard components. For this purpose, fault tolerance techniques that could bring reliability to the onboard computer were researched and implemented, such as a processor redundancy switching system, a fault manager that could verify if the faults are permanent or transient, as well as other systems such as SRAM memory protection system and a system that manages the redundancy switching of OBCs. The experimental tests performed on the proposed OBC fault tolerance systems obtained results that addressed the requirements described in this thesis, which were based on three main fundamentals: low electrical power consumption, high computational performance, and high reliability. Additionally, its reliability is compatible with existing OBCs from academic and industrial communities. In this sense, this thesis describes an architecture of a high-reliability OBC, which has differential fault tolerance techniques capable of providing continuity of operation of the onboard computing subsystem even in the presence of failures. In the face of the results, it can be concluded that the objectives of this thesis were achieved because not only a fault-tolerant OBC based on COTS was proposed, but also secondary objectives such as low power consumption, high performance, and reconfigurability of the system were achieved.
publishDate 2022
dc.date.accessioned.fl_str_mv 2022-03-23T10:41:00Z
dc.date.available.fl_str_mv 2022-03-23T10:41:00Z
dc.date.issued.fl_str_mv 2022
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/doctoralThesis
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dc.identifier.citation.fl_str_mv MOTA, David Freitas Moura. Robust OBC: um sistema de computação de bordo tolerante a falhas. 2022. 143 f. Tese (Doutorado em Engenharia de Teleinformática) – Universidade Federal do Ceará, Centro de Tecnologia, Programa de Pós-graduação em Engenharia de Teleinformática, Fortaleza, 2022.
dc.identifier.uri.fl_str_mv http://www.repositorio.ufc.br/handle/riufc/64557
identifier_str_mv MOTA, David Freitas Moura. Robust OBC: um sistema de computação de bordo tolerante a falhas. 2022. 143 f. Tese (Doutorado em Engenharia de Teleinformática) – Universidade Federal do Ceará, Centro de Tecnologia, Programa de Pós-graduação em Engenharia de Teleinformática, Fortaleza, 2022.
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