Mixed-signal analog-digital circuits design on the pre-diffused digital array using trapezoidal association of transistors
| Ano de defesa: | 2001 |
|---|---|
| Autor(a) principal: | |
| Orientador(a): | |
| Banca de defesa: | |
| Tipo de documento: | Tese |
| Tipo de acesso: | Acesso aberto |
| Idioma: | eng |
| Instituição de defesa: |
Não Informado pela instituição
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| Programa de Pós-Graduação: |
Não Informado pela instituição
|
| Departamento: |
Não Informado pela instituição
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| País: |
Não Informado pela instituição
|
| Palavras-chave em Português: | |
| Palavras-chave em Inglês: | |
| Link de acesso: | http://hdl.handle.net/10183/2884 |
Resumo: | The mixed-signal and analog design on a pre-diffused array is a challenging task, given that the digital array is a linear matrix arrangement of minimum-length transistors. To surmount this drawback a specific discipline for designing analog circuits over such array is required. An important novel technique proposed is the use of TAT (Trapezoidal Associations of Transistors) composite transistors on the semi-custom Sea-Of-Transistors (SOT) array. The analysis and advantages of TAT arrangement are extensively analyzed and demonstrated, with simulation and measurement comparisons to equivalent single transistors. Basic analog cells were also designed as well in full-custom and TAT versions in 1.0mm and 0.5mm digital CMOS technologies. Most of the circuits were prototyped in full-custom and TAT-based on pre-diffused SOT arrays. An innovative demonstration of the TAT technique is shown with the design and implementation of a mixed-signal analog system, i. e., a fully differential 2nd order Sigma-Delta Analog-to-Digital (A/D) modulator, fabricated in both full-custom and SOT array methodologies in 0.5mm CMOS technology from MOSIS foundry. Three test-chips were designed and fabricated in 0.5mm. Two of them are IC chips containing the full-custom and SOT array versions of a 2nd-Order Sigma-Delta A/D modulator. The third IC contains a transistors-structure (TAT and single) and analog cells placed side-by-side, block components (Comparator and Folded-cascode OTA) of the Sigma-Delta modulator. |
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Choi, Jung HyunBampi, Sergio2007-06-06T17:24:35Z2001http://hdl.handle.net/10183/2884000327748The mixed-signal and analog design on a pre-diffused array is a challenging task, given that the digital array is a linear matrix arrangement of minimum-length transistors. To surmount this drawback a specific discipline for designing analog circuits over such array is required. An important novel technique proposed is the use of TAT (Trapezoidal Associations of Transistors) composite transistors on the semi-custom Sea-Of-Transistors (SOT) array. The analysis and advantages of TAT arrangement are extensively analyzed and demonstrated, with simulation and measurement comparisons to equivalent single transistors. Basic analog cells were also designed as well in full-custom and TAT versions in 1.0mm and 0.5mm digital CMOS technologies. Most of the circuits were prototyped in full-custom and TAT-based on pre-diffused SOT arrays. An innovative demonstration of the TAT technique is shown with the design and implementation of a mixed-signal analog system, i. e., a fully differential 2nd order Sigma-Delta Analog-to-Digital (A/D) modulator, fabricated in both full-custom and SOT array methodologies in 0.5mm CMOS technology from MOSIS foundry. Three test-chips were designed and fabricated in 0.5mm. Two of them are IC chips containing the full-custom and SOT array versions of a 2nd-Order Sigma-Delta A/D modulator. The third IC contains a transistors-structure (TAT and single) and analog cells placed side-by-side, block components (Comparator and Folded-cascode OTA) of the Sigma-Delta modulator.application/pdfengMicroeletrônicaVLSICMOS analog designPhysical implementationSOT arrayTAT transistorsAnalog cellsSigma-Delta convertersMixed-signal analog-digital circuits design on the pre-diffused digital array using trapezoidal association of transistorsinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/doctoralThesisUniversidade Federal do Rio Grande do SulInstituto de InformáticaPrograma de Pós-Graduação em ComputaçãoPorto Alegre, BR-RS2001doutoradoinfo:eu-repo/semantics/openAccessreponame:Biblioteca Digital de Teses e Dissertações da UFRGSinstname:Universidade Federal do Rio Grande do Sul (UFRGS)instacron:UFRGSORIGINAL000327748.pdf000327748.pdfTexto completo (inglês)application/pdf3264916http://www.lume.ufrgs.br/bitstream/10183/2884/1/000327748.pdf4214429ed5274a7d7cddb87873357462MD51TEXT000327748.pdf.txt000327748.pdf.txtExtracted Texttext/plain298394http://www.lume.ufrgs.br/bitstream/10183/2884/2/000327748.pdf.txt85e91dd2351a7b9821421538e616abe3MD52THUMBNAIL000327748.pdf.jpg000327748.pdf.jpgGenerated Thumbnailimage/jpeg1181http://www.lume.ufrgs.br/bitstream/10183/2884/3/000327748.pdf.jpg7560b71d37858abcce46536338dde757MD5310183/28842021-05-07 05:16:01.30911oai:www.lume.ufrgs.br:10183/2884Biblioteca Digital de Teses e Dissertaçõeshttps://lume.ufrgs.br/handle/10183/2PUBhttps://lume.ufrgs.br/oai/requestlume@ufrgs.br||lume@ufrgs.bropendoar:18532021-05-07T08:16:01Biblioteca Digital de Teses e Dissertações da UFRGS - Universidade Federal do Rio Grande do Sul (UFRGS)false |
| dc.title.pt_BR.fl_str_mv |
Mixed-signal analog-digital circuits design on the pre-diffused digital array using trapezoidal association of transistors |
| title |
Mixed-signal analog-digital circuits design on the pre-diffused digital array using trapezoidal association of transistors |
| spellingShingle |
Mixed-signal analog-digital circuits design on the pre-diffused digital array using trapezoidal association of transistors Choi, Jung Hyun Microeletrônica VLSI CMOS analog design Physical implementation SOT array TAT transistors Analog cells Sigma-Delta converters |
| title_short |
Mixed-signal analog-digital circuits design on the pre-diffused digital array using trapezoidal association of transistors |
| title_full |
Mixed-signal analog-digital circuits design on the pre-diffused digital array using trapezoidal association of transistors |
| title_fullStr |
Mixed-signal analog-digital circuits design on the pre-diffused digital array using trapezoidal association of transistors |
| title_full_unstemmed |
Mixed-signal analog-digital circuits design on the pre-diffused digital array using trapezoidal association of transistors |
| title_sort |
Mixed-signal analog-digital circuits design on the pre-diffused digital array using trapezoidal association of transistors |
| author |
Choi, Jung Hyun |
| author_facet |
Choi, Jung Hyun |
| author_role |
author |
| dc.contributor.author.fl_str_mv |
Choi, Jung Hyun |
| dc.contributor.advisor1.fl_str_mv |
Bampi, Sergio |
| contributor_str_mv |
Bampi, Sergio |
| dc.subject.por.fl_str_mv |
Microeletrônica |
| topic |
Microeletrônica VLSI CMOS analog design Physical implementation SOT array TAT transistors Analog cells Sigma-Delta converters |
| dc.subject.eng.fl_str_mv |
VLSI CMOS analog design Physical implementation SOT array TAT transistors Analog cells Sigma-Delta converters |
| description |
The mixed-signal and analog design on a pre-diffused array is a challenging task, given that the digital array is a linear matrix arrangement of minimum-length transistors. To surmount this drawback a specific discipline for designing analog circuits over such array is required. An important novel technique proposed is the use of TAT (Trapezoidal Associations of Transistors) composite transistors on the semi-custom Sea-Of-Transistors (SOT) array. The analysis and advantages of TAT arrangement are extensively analyzed and demonstrated, with simulation and measurement comparisons to equivalent single transistors. Basic analog cells were also designed as well in full-custom and TAT versions in 1.0mm and 0.5mm digital CMOS technologies. Most of the circuits were prototyped in full-custom and TAT-based on pre-diffused SOT arrays. An innovative demonstration of the TAT technique is shown with the design and implementation of a mixed-signal analog system, i. e., a fully differential 2nd order Sigma-Delta Analog-to-Digital (A/D) modulator, fabricated in both full-custom and SOT array methodologies in 0.5mm CMOS technology from MOSIS foundry. Three test-chips were designed and fabricated in 0.5mm. Two of them are IC chips containing the full-custom and SOT array versions of a 2nd-Order Sigma-Delta A/D modulator. The third IC contains a transistors-structure (TAT and single) and analog cells placed side-by-side, block components (Comparator and Folded-cascode OTA) of the Sigma-Delta modulator. |
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2001 |
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2001 |
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2007-06-06T17:24:35Z |
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