Retificadores PFC monofásicos isolados integrados empregando estratégias de controle e modulação para redução de capacitância

• Ano de defesa: 2024
• Autor(a) principal: Burgardt, Ismael
• Tipo de documento: Tese
• Tipo de acesso: Acesso aberto
• Idioma: por
• Instituição de defesa: Universidade Tecnológica Federal do Paraná; Curitiba; Brasil; Programa de Pós-Graduação em Engenharia Elétrica e Informática Industrial; UTFPR
• Palavras-chave em Português: Retificadores de corrente elétrica; Fator de potência; Eletrônica de potência; Capacitadores; Conversores de corrente elétrica; Moduladores (Eletrônica); Simulação (Computadores); Electric current rectifiers; Electric power factor; Power electronics; Capacitors; Electric current converters; Modulators (Electronics); Computer simulation; CNPQ::ENGENHARIAS::ENGENHARIA ELETRICA; Engenharia Elétrica
• Link de acesso: http://repositorio.utfpr.edu.br/jspui/handle/1/35911

Capacitance reduction in single-phase static rectifiers has been the focus of several works. With capacitance reduction it is possible, in many cases, to replace electrolytic capacitors, prolonging the lifespan of the converter. Among the different techniques used to promote this capacitance reduction, the use of modulation and control strategy has the advantage of not adding extra elements to the circuit. Thus, in this work, it is initially proposed the application of a hybrid modulation in a converter derived from the integration of a modified Boost rectifier and a Full-Bridge ZVS. This hybrid modulation is composed of PWM and PSM working at the same time. A prototype of power equal to 300 W was built, reaching the approximate efficiency of 92.4% operating at rated power, with a power factor of 0.994. It was possible to reduce the output ripple with a capacitance ratio of 0.18 µF/W, allowing the non-use of electrolytic capacitors. It is also proposed a second PWM modulation technique in a converter derived from the integration of a Boost rectifier and a two-switches Forward converter. In this modulation strategy, two distinct duty cycles 1 and 2 are used, applied to switches 1 and 2, respectively. Where 1 is responsible for controlling the power factor, and 2 is responsible for controlling the power flow to the output in order to reduce the output ripple actively. A second prototype with a nominal power equal to 500 W was built to prove the effectiveness of this strategy. It achieved an efficiency of 90% when operating at nominal power, with a power factor of 0.9953. It is possible to reduce the output voltage ripple with a ratio of 0.164 µF/W, allowing the non-use of electrolytic capacitors.